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Job Overview

This position is an excellent opportunity for an experienced and highly motivated Verification Engineer to join the hardworking System IP team!

Job Overview

This position is an excellent opportunity for an experienced and highly motivated Verification Engineer to join the hardworking System IP team!

This is a fast-paced technical role employing the latest hardware design and verification methodologies to develop complex and highly configurable hardware IP that sit at the heart of Arm-based Systems!

About System IP

This role is for the System MMU product teams.

The SMMU team owns the development of next-generation Arm SMMU targeting high-end mobile, networking and enterprise markets. The SMMU is a key component of the Arm Architecture that provides critical and complex functionalities that complement systems design with Arm processors and Multimedia IP.

What will I be accountable for?

You will specify and develop new hardware verification testbenches for future generation hardware IP. You will improve existing testbenches to increase performance, quality and efficiency. You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises and state of the art for hardware verification.

The responsibilities of a member of the Verification team are

• Reviewing and assessing proposed design changes from a verification complexity point of view
• Develop and own verification plans for IP blocks based on architecture and design specifications.
• Define testbenches, coverage goals, and verification environments using industry-standard methodologies
• Investigating and scripting new verification flows and optimising existing ones
• Developing methodology and deploying within the group and having full ownership of verification closure and mentoring other members of the team.
• Collaborate with architects, RTL designers, and software teams to define verification scope and goals.
• Close collaboration with other Arm engineering teams leading to high quality IP that works well in a complete system.
  
  

• You can demonstrate experience in working with constrained-random verification including ownership of a suitably complex verification environment.
• Experience of architecting and implementing functional verification environments for complex IP.
• Experience developing re-usable and scalable code whilst having good knowledge of UVM.
• Strong scripting skills – being able to develop scripting to support new flows.
• Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms.
• You are familiar with the tools and processes for developing testbenches and finishing all aspects of the verification process.
• Strong communication skills and ability to work well as part of a team.
• Dedicated with a focused approach to problem analysis and solving.
• Strong experience in planning and estimation.
  
  

• Team leadership and mentoring experience
• Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g. AMBA5 CHI, AMBA4 ACE or AXI)
• Experience in Formal Verification testbenches is a plus.
  
  

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Quality Assurance

• Industries

  Semiconductor Manufacturing, Software Development, and Computer Hardware Manufacturing

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